At Hot Chips 2026, SK Hynix packaging engineering VP Jaesik Lee said the company will adopt advanced packaging—including Intel's EMIB—for next‑generation HBM and plans to transition to 3D packaging. SK Hynix is exploring hybrid bonding to overcome the 16‑layer stacking limit and intends to increase TSV counts, raise IO speeds through tighter logic‑process integration, and optimize power‑delivery networks to mitigate power and thermal challenges.

2026-08-24

At Hot Chips 2026, SK Hynix packaging engineering VP Jaesik Lee said the company will adopt advanced packaging—including Intel's EMIB—for next‑generation HBM and plans to transition to 3D packaging. SK Hynix is exploring hybrid bonding to overcome the 16‑layer stacking limit and intends to increase TSV counts, raise IO speeds through tighter logic‑process integration, and optimize power‑delivery networks to mitigate power and thermal challenges.