Hubei Jiangcheng Laboratory said it has developed a 3D multilayer on‑chip
capacitor with capacitance density exceeding 1,000 nF/mm2, targeting direct use
in AI/GPU chips and high‑performance processors. The lab said the technology
supports high‑compute, low‑power chip design and is undergoing process tape‑out
and small‑batch trial production, with plans for scale-up in advanced packaging.
The release described the capacitor as an ultra‑miniature energy buffer that
smooths voltage during rapid current swings and complements HBM as an energy
cache across nanosecond‑to‑second timescales to sustain GPU peak power.
