The demand for High Bandwidth Memory (HBM) from AI chip customers is changing, with bandwidth and capacity becoming increasingly important, driving up the number of HBM stacking layers and the amount of HBM used per chip.
1. NVIDIA Rubin may cancel its 8-layer HBM solution.
Due to limited supply of basic HBM dies and customers prioritizing bandwidth over cost efficiency, Rubin's original plan to use a mix of 8-layer and 12-layer HBM may be adjusted to use only 12 layers. The Rubin Ultra, planned for release in 2027, is currently undergoing tape-out of multiple architecture versions, initially expected to use the highest specification 8-layer HBM4, later upgraded to 8-layer or 12-layer HBM4E.
2. AMD's single-chip HBM usage is expected to increase by 50%.
It is projected that products in 2027 will use a mix of 8-layer and 12-layer HBM4. The number of HBM stacks within a single CoWoS package for the MI450 may increase from 8 to 12, with a total capacity of 288GB, which will benefit the increase in HBM usage per AI accelerator.
3. OpenAI and Anthropic have different configurations. OpenAI's AI chips will use 12-layer HBM4, while Anthropic uses 8-layer HBM4. (Daishin Securities, South Korea)
